The generation of events following an input trigger pulse is a common requirement in electrical applications. Generally, a timing delay generator receives a trigger signal and counts pulses of an internally generated master clock to generate a known delay. When the trigger signal is received at a random time between the master clock pulses, there is inherent timing uncertainty. This timing uncertainty, commonly called jitter, is caused from the triggering event not being related in phase to the master clock. In particular, the timing uncertainty relates to the temporal difference between the trigger signal and the master clock pulse. Therefore, the timing uncertainty relates to the period of the master clock. As the frequency, or speed, of the master clock is increased, and its period proportionally reduced, the maximum timing uncertainty is reduced. However, increasing the speed of the master clock typically comes at the expense of increased circuit complexity and cost. Additionally, there are practical limits to the speed of a master clock. For example, in order to decrease the peak timing uncertainty to the picosecond order of magnitude, a master clock operating at one terahertz would be required. However, one terahertz clocks are not practical with currently available technology. Accordingly, there is a need for methods and apparatus for the generation of precision delays following trigger pulses which occur at random times between clock pulses.